1. Field of the Invention
The present invention relates to a liquid crystal display device equipped with a liquid crystal panel. More specifically the invention pertains to a technique of restraining the appearance of ghost in a displayed image, due to a variation in signal delay in the liquid crystal panel with a temperature change or with time.
2. Description of the Related Art
In a liquid crystal display device equipped with an active matrix-driving liquid crystal panel driven by thin film transistors (hereafter referred to as TFTs), a large number of scanning lines and data lines respectively arranged in rows and columns and a large number of pixel electrodes set at respective intersections of the scanning lines and the data lines are formed on a glass substrate. Periphery circuits including a scanning line driving circuit, a data line driving circuit, sampling circuits, and pixel TFT circuits may also be formed on the glass substrate. Liquid crystal cells corresponding to the large number of pixel electrodes are sealed between a pair of facing glass substrates to form a liquid crystal panel.
The data line driving circuit generates a sampling circuit driving signal to determine a drive timing of each sampling circuit, in response to a timing signal output from a timing generator, and outputs the generated sampling circuit driving signal to the sampling circuit.
The sampling circuit includes a switching element like a TFT and outputs an externally-given video signal to the pixel TFT circuit during only a high-level time period of the sampling circuit driving signal.
The pixel TFT circuit receives a scanning signal output from the scanning line driving circuit and outputs the video signal to the pixel electrodes during only a high-level time period of the scanning signal.
In response to input of the video signal, a voltage between each pixel electrode and a common electrode varies to change the configuration of liquid crystal molecules in the liquid crystal cell sealed between the pixel electrode and the common electrode. The light entering the liquid crystal cells is permitted to transmit or is blocked off in response to the video signal, and is modulated to display a resulting image corresponding to the video signal across the liquid crystal panel.
When the high-level time period of the sampling circuit driving signal is temporally consistent with a saturation time period of the externally input video signal in the sampling circuit, an adequate image is displayed according to the video signal. The high-level time period of the sampling circuit driving signal may, however, be temporally deviated by a manufacturing variation in internal delay of each liquid crystal panel or by a variation in internal delay of the liquid crystal panel with a temperature change or with time in use. This may lead to the appearance of ghost in a resulting displayed image.
The relation between the temporal deviation of the high-level time period of the sampling circuit driving signals and the occurrence of ghost is described with reference to FIG. 2.
FIGS. 2(A) to 2(C) show temporal relations between a video signal VID externally input into sampling circuits and sampling circuit driving signals S input from the data line driving circuit into the sampling circuits, as well as images displayed on a liquid crystal panel 200 in the respective temporal relations.
The video signal VID represents a substantially rectangular window pattern 201 on light gray background and is expanded to 6 phases VID1 to VID6. The video signals VID1 to VID6 are simultaneously input into 6 consecutive pixel electrodes via 6 consecutive sampling circuits and pixel TFT circuits.
A different sampling circuit driving signal S1, S2, . . . is generated for each group of 6 consecutive sampling circuits. For explanation of the appearance of ghost with regard to 12 consecutive pixels N to N+11, FIG. 2 shows only two sampling circuit driving signals, that is, a sampling circuit driving signal Sk corresponding to pixels N to N+5 and a sampling circuit driving signal Sk+1 corresponding to pixels N+6 to N+11.
The video signals VID1 to VID6 are expressed by a waveform having a voltage level (2 V) representing black and a voltage level (3 V) representing light gray. The waveform is dulled by integration in an internal circuit. It is thus important to output the video signals VID1 to VID6 to the pixel TFT circuits during saturation time periods when the video signals VID1 to VID6 have reached saturation levels (for example, at latest time periods in respective video signal cycles Ta and Tb in the example of FIG. 2).
FIG. 2(A) shows an adequate state where the sampling circuit driving signals Sk and Sk+1 have an adequate temporal relation to the video signals VID1 to VID6. FIG. 2(B) shows a temporal advance state where the sampling circuit driving signals Sk and Sk+1 are advanced relative to the video signals VID1 to VID6 from the state of FIG. 2(A). FIG. 2(C) shows a temporal lag state where the sampling circuit driving signals Sk and Sk+1 are delayed relative to the video signals VID1 to VID6 from the state of FIG. 2(A).
In the example of FIG. 2, a high-level time period Pa of the sampling circuit driving signal Sk specifies an input timing of the video signals VID1 to VID6 to the pixel TFT circuits corresponding to the 6 consecutive pixels N to N+5, which are extended outward from a left end of the window pattern 201.
In the state of FIG. 2(A), the high-level time period Pa is temporally consistent with a saturation time period in the video signal cycle Ta when the video signals VID1 to VID6 have reached a saturation level (3 V) of light gray. The video signals VID1 to VID6 representing light gray are thus input respectively to the pixel electrodes corresponding to the pixels N to N+5.
A high-level time period Pb of the sampling circuit driving signal Sk+1 specifies an input timing of the video signals VID1 to VID6 to the pixel TFT circuits corresponding to the 6 consecutive pixels N+6 to N+11, which are extended inward from the left end of the window pattern 201.
In the state of FIG. 2(A), the high-level time period Pb is temporally consistent with a saturation time period in the video signal cycle Tb when the video signals VID1 to VID6 have reached a saturation level (2 V) of black. The video signals VID1 to VID6 representing black are thus input respectively to the pixel electrodes corresponding to the pixels N+6 to N+11.
In the state of FIG. 2(A), no ghost appears on the left end of the window pattern 201.
A similar phenomenon arises on the right end of the window pattern 201. A high-level time period of a sampling circuit driving signal S corresponding to 6 consecutive pixels, which are extended inward from a right end of the window pattern 201, is temporally consistent with a saturation time period in a video signal cycle when the video signals VID1 to VID6 have reached the saturation level (2 V) of black. A high-level time period of a sampling circuit driving signal S corresponding to 6 consecutive pixels, which are extended outward from the right end of the window pattern 201, is temporally consistent with a saturation time period in a video signal cycle when the video signals VID1 to VID6 have reached the saturation level (3 V) of light gray. There is accordingly no ghost appearing on the right end of the window pattern 201.
This phenomenon is not restricted to the lines of the pixels N to N+11 but appears on all the lines of the liquid crystal panel. No ghost accordingly appears in the whole image as shown in FIG. 2W).
In the state of FIG. 2(B), the sampling circuit driving signals Sk and Sk+1 are temporally advanced to advance the high-level time period Pa and the high-level time period Pb. Especially part of the high-level time period Pb is deviated from the saturation time period in the video signal cycle Tb when the video signals VID1 to VID6 have reached the saturation level (3 V) of black and temporally overlaps with a voltage level close to light gray. The video signals VID1 to VID6 having the voltage level close to light gray, as well as the video signals VID1 to VID6 at the saturation level (2 V) of black are thus input into the pixel electrodes corresponding to the pixels N+6 to N+11. Such mixture leads to the occurrence of a dark gray ghost A inside the left end of the window pattern 201.
A similar phenomenon arises on 6 consecutive pixels, which are extended outward from the right end of the window pattern 201. The video signals VID1 to VID6 having a voltage level close to black, as well as the video signals VID1 to VID6 at the saturation level (3 V) of light gray are input into the respective pixel electrodes. Such mixture leads to the occurrence of a dark gray ghost B outside the right end of the window pattern 201.
This phenomenon is not restricted to the lines of the pixels N to N+11 but appears on all the lines of the liquid crystal panel. The dark gray ghost A accordingly appears inside the whole left end of the window pattern 201, while the dark gray ghost B appears outside the whole right end of the window pattern 201, as shown in FIG. 2(B).
The depths of the dark gray ghosts A and B depend upon the degrees of the temporal advances of the sampling circuit driving signals Sk and Sk+1.
In the state of FIG. 2(C), the sampling circuit driving signals Sk and Sk+1 are temporally delayed to delay the high-level time period Pa and the high-level time period Pb. Especially part of the high-level time period Pa is deviated from the saturation time period in the video signal cycle Ta when the video signals VID1 to VID6 have reached the saturation level (3 V) of light gray and temporally overlaps with a voltage level close to black. The video signals VID1 to VID6 having the voltage level close to black, as well as the video signals VID1 to VID6 at the saturation level (3 V) of light gray are thus input into the pixel electrodes corresponding to the pixels N to N+5. Such mixture leads to the occurrence of a dark gray ghost C outside the left end of the window pattern 201.
A similar phenomenon arises on 6 consecutive pixels, which are extended inward from the right end of the window pattern 201. The video signals VID1 to VID6 having a voltage level close to light gray, as well as the video signals VID1 to VID6 at the saturation level (2 V) of black are input into the respective pixel electrodes. Such mixture leads to the occurrence of a dark gray ghost D inside the right end of the window pattern 201.
This phenomenon is not restricted to the lines of the pixels N to N+11 but appears on all the lines of the liquid crystal panel. The dark gray ghost C accordingly appears outside the whole left end of the window pattern 201, while the dark gray ghost D appears inside the whole right end of the window pattern 201, as shown in FIG. 2(C).
The depths of the dark gray ghosts C and D depend upon the degrees of the temporal lags of the sampling circuit driving signals Sk and Sk+1.
The above description regards the liquid crystal panel of monochromatic display. The similar phenomenon also appears in liquid crystal panels of color display, for example, a liquid crystal panel that colors the transmitted light with one of color filters R (red), G (green), and B (blue) with regard to each pixel. In this color display technique, 3 consecutive pixels compose one color and thus correspond to one pixel in the liquid crystal panel of monochromatic display.
The liquid crystal display device having the circuit structure discussed above has been proposed, for example, in Japanese Patent Laid-Open Gazette No. 11-282426.
The prior art technique adjusts the temporal deviation of the sampling circuit driving signals from the video signals, which may lead to the appearance of ghost, with regard to each liquid crystal panel in its manufacturing process.
One concrete procedure displays a ghost test pattern including the black window pattern 201 on the light gray background as shown in FIG. 2 on the liquid crystal panel and measures a difference in luminance between the background color and the appearing ghost. The procedure detects a timing of the minimum luminance difference and stores the detected timing in a memory. The liquid crystal display device is then reset to read the timing from the memory and reflects the timing on the setting of a timing setting register built in the timing generator. This gives an adequate timing of the timing signal and adjusts the temporal deviation of the sampling circuit driving signals, which are generated in response to the timing signal, from the video signals.
Even when such adjustment is carried out, however, there is a signal delay in the liquid crystal panel with a temperature change or with time in use of the liquid crystal panel. The variation in signal delay temporally deviates the sampling circuit driving signals from the video signals and may lead to the appearance of ghost in a resulting displayed image.